Porting Test Drive II from SNES to PC, Part 37: Narrowing the SNES clock-slot timing drift

Porting Test Drive II from SNES to PC, Part 37: Narrowing the SNES clock-slot timing drift The previous checkpoint closed the organic default-rival path: L00C20B -> 01:C1D2 -> L00BE76 -> L008B87 -> 01:902D -> active_main = 02:9016 That left one narrow front-end problem: can the fourth Select Opponent clock slot be chosen organically in the same live corridor? This checkpoint does not close that slot yet. It does something almost as useful: it proves why the obvious fixed-frame approach is still failing. The remaining problem is not the button map Static bank-1 reading at L00C32A..L00C371 already showed that the input loop applies vertical and horizontal bits in sequence. So right+down is not being discarded because of a bad button interpretation. The problem is timing. More precisely: the live 01:C1D2 window itself keeps sliding when the earlier confirmation windows move. Two bounded follow-ups prove the drift In v3, I moved right+down later and kept start relatively ear